Due to further augmented integration densities and functionalities, the design of analog circuits has become increasingly complex.
Due to the complexity of the circuits, a structured circuit design—following, for instance, the “top-down”, “bottom-up”, or some other common approach—has become indispensable.
In the case of the top-down approach, the design of the corresponding circuit is, for instance, started on a relatively high abstraction level; subsequently, the corresponding design is—on ever lower abstraction levels—increasingly refined (e.g. —functionally—starting out from a “system level” to a “circuit level”, etc., or—structurally—starting out from an “overall system level” via corresponding “subsystem” or “module” levels to the “individual circuit element level” with the various individual devices (transistors, diodes, resistors, capacitors, etc.).
Appropriate tests or simulations, respectively, take place (on every abstraction level) after every design step. In the case of fault, the design result will have to be modified, or the corresponding design step will have to be repeated, or the design will have to be started anew on some higher level.
The circuit models are available either e.g. structurally in the form of network lists with analog circuit elements (transistors, diodes, resistors, capacitors, etc.), or e.g. functionally in the form of an analog description language such as VHDL-AMS, or in mixed forms of structural and functional description.
The above-mentioned proceeding (performing of simulations after every design step on every abstraction level) is to ensure—despite the increased circuit complexity caused by increased integration densities and functionalities—that the designed circuit works without fault.
In the case of the common circuit simulation methods, the circuit behavior (input/output behavior)—in the time range—is examined at different test input signals, which may involve great efforts, and (since the circuit can, within a justifiable time, be tested for a limited number of different test input signals only) does not always furnish the desired certainty with respect to receiving all and any circuit states that are practically existing.